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UML state machine diagram - Template

"State machine diagram is a behavior diagram which shows discrete behavior of a part of designed system through finite state transitions. State machine diagrams can also be used to express the usage protocol of part of a system. Two kinds of state machines defined in UML 2.4 are:
(1) behavioral state machine, and
(2) protocol state machine.
The following nodes and edges are typically drawn in state machine diagram: behavioral state, behavioral transition, protocol state, protocol transition, different pseudostates. ...
Behavioral state machine is specialization of behavior and is used to specify discrete behavior of a part of designed system through finite state transitions. The state machine formalism used in this case is an object-based variant of Harel statecharts.
Behavior is modeled as a traversal of a graph of state nodes connected with transitions. Transitions are triggered by the dispatching of series of events. During the traversal, the state machine could also execute some activities. ...
Protocol state machine is a specialization of behavioral state machine and is used to express usage protocol or lifecycle of a classifier. It specifies which operations of the classifier can be called in which state and under which condition, thus specifying the allowed call sequences on the classifier’s operations. Protocol state machines express the legal transitions that a classifier can trigger." [uml-diagrams.org/state-machine-diagrams.html]
The template "UML state machine diagram" for the ConceptDraw PRO diagramming and vector drawing software is included in the Rapid UML solution from the Software Development area of ConceptDraw Solution Park.
www.conceptdraw.com/solution-park/software-uml Read more
UML state machine diagram
UML state machine diagram,  UML state machine diagram symbols, simple state, initial state, final state, composite state
This vector stencils library contains 47 SysML symbols.
Use it to design your state machine diagrams using ConceptDraw PRO diagramming and vector drawing software.
"The state diagram in the Unified Modeling Language is essentially a Harel statechart with standardized notation, which can describe many systems, from computer programs to business processes. In UML 2 the name has been changed to State Machine Diagram. The following are the basic notational elements that can be used to make up a diagram:
- Filled circle, representing to the initial state
- Hollow circle containing a smaller filled circle, indicating the final state (if any)
- Rounded rectangle, denoting a state. Top of the rectangle contains a name of the state. Can contain a horizontal line in the middle, below which the activities that are done in that state are indicated
- Arrow, denoting transition. The name of the event (if any) causing this transition labels the arrow body. A guard expression may be added before a "/" and enclosed in square-brackets ( eventName[guardExpression] ), denoting that this expression must be true for the transition to take place. If an action is performed during this transition, it is added to the label following a "/" ( eventName[guardExpression]/action ).
- Thick horizontal line with either x>1 lines entering and 1 line leaving or 1 line entering and x>1 lines leaving. These denote join/fork, respectively." [State diagram (UML). Wikipedia]
The vector stencils library "State machine diagram" is included in the SysML solution from the Software Development area of ConceptDraw Solution Park. Read more
Choice pseudostate
Choice pseudostate, choice pseudostate,
Composite state
Composite state, state, initial node, control node, control operator node, composite state,
Entry point
Entry point, entry point,
Exit point
Exit point, exit point,
Final state
Final state, initial node, final state,
History, deep pseudostate
History, deep pseudostate, history, deep pseudostate,
History, shallow pseudostate
History, shallow pseudostate, history, shallow pseudostate,
Initial pseudostate
Initial pseudostate, initial pseudostate,
Junction pseudostate
Junction pseudostate, junction pseudostate,
Receive signal action
Receive signal action, receive signal action,
Send signal action
Send signal action, send signal action,
Action
Action, action,
Region
Region, region, control operator node,
Simple state
Simple state, simple state,
Simple state 2
Simple state 2, simple state,
State list
State list, state list,
State machine
State machine, state machine, initial node, final state, control operator node,
Terminate node
Terminate node, terminate node,
Submachine state
Submachine state, submachine state, exit point, control operator node,
Transition
Transition, transition,
This example was redesigned from the Wikimedia Commons file: UML state diagram.png.
[commons.wikimedia.org/wiki/File:UML_state_diagram.png]
This file is licensed under the Creative Commons Attribution-Share Alike 3.0 Unported license. [creativecommons.org/licenses/by-sa/3.0/deed.en]
"The StateMachine package defines a set of concepts that can be used for modeling discrete behavior through finite state transition systems. The state machine represents behavior as the state history of an object in terms of its transitions and states. The activities that are invoked during the transition, entry, and exit of the states are specified along with the associated event and guard conditions. Activities that are invoked while in the state are specified as “do Activities,” and can be either continuous or discrete. A composite state has nested states that can be sequential or concurrent.
The UML concept of protocol state machines is excluded from SysML to reduce the complexity of the language.
The standard UML state machine concept (called behavior state machines in UML) are thought to be sufficient for expressing protocols." [omg.org/spec/SysML/1.3/PDF]
The example "State machine diagram" was drawn using the ConceptDraw PRO diagramming and vector drawing software extended with the SysML solution from the Software Development area of ConceptDraw Solution Park. Read more
SysML state machine diagram
SysML state machine diagram, transition, simple state, initial pseudostate, initial node, final state,
"State machine diagram is a behavior diagram which shows discrete behavior of a part of designed system through finite state transitions. State machine diagrams can also be used to express the usage protocol of part of a system. Two kinds of state machines defined in UML 2.4 are:
(1) behavioral state machine, and
(2) protocol state machine.
The following nodes and edges are typically drawn in state machine diagram: behavioral state, behavioral transition, protocol state, protocol transition, different pseudostates. ...
Behavioral state machine is specialization of behavior and is used to specify discrete behavior of a part of designed system through finite state transitions. The state machine formalism used in this case is an object-based variant of Harel statecharts.
Behavior is modeled as a traversal of a graph of state nodes connected with transitions. Transitions are triggered by the dispatching of series of events. During the traversal, the state machine could also execute some activities. ...
Protocol state machine is a specialization of behavioral state machine and is used to express usage protocol or lifecycle of a classifier. It specifies which operations of the classifier can be called in which state and under which condition, thus specifying the allowed call sequences on the classifier’s operations. Protocol state machines express the legal transitions that a classifier can trigger." [uml-diagrams.org/state-machine-diagrams.html]
The template "UML state machine diagram" for the ConceptDraw PRO diagramming and vector drawing software is included in the Rapid UML solution from the Software Development area of ConceptDraw Solution Park.
www.conceptdraw.com/solution-park/software-uml Read more
UML state machine diagram
UML state machine diagram,  UML state machine diagram symbols, simple state, initial state, final state, composite state
This example was redesigned from the Wikimedia Commons file: UML state diagram.png.
[commons.wikimedia.org/wiki/File:UML_state_diagram.png]
This file is licensed under the Creative Commons Attribution-Share Alike 3.0 Unported license. [creativecommons.org/licenses/by-sa/3.0/deed.en]
"The StateMachine package defines a set of concepts that can be used for modeling discrete behavior through finite state transition systems. The state machine represents behavior as the state history of an object in terms of its transitions and states. The activities that are invoked during the transition, entry, and exit of the states are specified along with the associated event and guard conditions. Activities that are invoked while in the state are specified as “do Activities,” and can be either continuous or discrete. A composite state has nested states that can be sequential or concurrent.
The UML concept of protocol state machines is excluded from SysML to reduce the complexity of the language.
The standard UML state machine concept (called behavior state machines in UML) are thought to be sufficient for expressing protocols." [omg.org/spec/SysML/1.3/PDF]
The example "State machine diagram" was drawn using the ConceptDraw PRO diagramming and vector drawing software extended with the SysML solution from the Software Development area of ConceptDraw Solution Park. Read more
SysML state machine diagram
SysML state machine diagram, transition, simple state, initial pseudostate, initial node, final state,
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The vector stencils library "UML activity diagrams" contains 37 symbols for the ConceptDraw PRO diagramming and vector drawing software.
"Activity diagrams are constructed from a limited number of shapes, connected with arrows. The most important shape types:
(1) rounded rectangles represent actions;
(2) diamonds represent decisions;
(3) bars represent the start (split) or end (join) of concurrent activities;
(4) a black circle represents the start (initial state) of the workflow;
(5) an encircled black circle represents the end (final state).
Arrows run from the start towards the end and represent the order in which activities happen.
Hence they can be regarded as a form of flowchart. Typical flowchart techniques lack constructs for expressing concurrency. However, the join and split symbols in activity diagrams only resolve this for simple cases; the meaning of the model is not clear when they are arbitrarily combined with decisions or loops." [Activity diagram. Wikipedia]
The example "Design elements - UML activity diagrams" is included in the Rapid UML solution from the Software Development area of ConceptDraw Solution Park. Read more
UML activity diagram symbols
UML activity diagram symbols, time event, swimlanes, swimlane, subactivity state, send signal, receive signal, object, note, initial, frame, flow final, final, decision, merge, data store, condition, central buffer, call behavior, action,
The vector stencils library "Analog and digital logic" contains 40 element symbols of logic (threshold) gates, bistable current switches, current controllers, regulators, electrical generators, and amplifiers.
Use it for drawing the digital and analog functions in electronic circuit diagrams and electrical schematics.
"Analogue electronics (or analog in American English) are electronic systems with a continuously variable signal, in contrast to digital electronics where signals usually take only two different levels. The term "analogue" describes the proportional relationship between a signal and a voltage or current that represents the signal." [Analogue electronics. Wikipedia]
"Digital electronics, or digital (electronic) circuits, represent signals by discrete bands of analog levels, rather than by a continuous range. All levels within a band represent the same signal state. Relatively small changes to the analog signal levels due to manufacturing tolerance, signal attenuation or parasitic noise do not leave the discrete envelope, and as a result are ignored by signal state sensing circuitry.
In most cases the number of these states is two, and they are represented by two voltage bands: one near a reference value (typically termed as "ground" or zero volts) and a value near the supply voltage, corresponding to the "false" ("0") and "true" ("1") values of the Boolean domain respectively.
Digital techniques are useful because it is easier to get an electronic device to switch into one of a number of known states than to accurately reproduce a continuous range of values.
Digital electronic circuits are usually made from large assemblies of logic gates, simple electronic representations of Boolean logic functions." [Digital electronics. Wikipedia]
The example "Design elements - Analog and digital logic" was drawn using the ConceptDraw PRO diagramming and vector drawing software extended with the Electrical Engineering solution from the Engineering area of ConceptDraw Solution Park. Read more
Analog and digital logic elements
Analog and digital logic elements, three-state buffer, switch point, summing amplifier, signal waveform, potentiometer, positional servomechanism, positional servo, operational amplifier, negative logic, dot, logic gate, inverter, integrator, amplifier, generalized integrator, function generator, flip-flop, latch, flip-flop, electronic multiplier, multiplier, electronic function generator, function generator, digital, crystal, crystal clock, signal generator, converter, clock, buffer, analog, amplifier, IO port, input and output port,

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ice hockey field, ice hockey rink diagram, ice hockey rink layout, hockey rink, hockey rink dimensions, hockey tactic, ice hockey tactic
The vector stencils library "UML state machine diagrams" contains 35 symbols for the ConceptDraw PRO diagramming and vector drawing software.
"The state diagram in the Unified Modeling Language is essentially a Harel statechart with standardized notation, which can describe many systems, from computer programs to business processes. In UML 2 the name has been changed to State Machine Diagram. The following are the basic notational elements that can be used to make up a diagram:
(1) Filled circle, pointing to the initial state.
(2) Hollow circle containing a smaller filled circle, indicating the final state (if any).
(3) Rounded rectangle, denoting a state. Top of the rectangle contains a name of the state. Can contain a horizontal line in the middle, below which the activities that are done in that state are indicated.
(4) Arrow, denoting transition. The name of the event (if any) causing this transition labels the arrow body. A guard expression may be added before a "/" and enclosed in square-brackets ( eventName[guardExpression] ), denoting that this expression must be true for the transition to take place. If an action is performed during this transition, it is added to the label following a "/" ( eventName[guardExpression]/action ).
(5) Thick horizontal line with either x>1 lines entering and 1 line leaving or 1 line entering and x>1 lines leaving. These denote join/fork, respectively." [State diagram (UML). Wikipedia]
The example "Design elements - UML state machine diagrams" is included in the Rapid UML solution from the Software Development area of ConceptDraw Solution Park. Read more
UML state machine diagram symbols
UML state machine diagram symbols, terminate pseudostate, synch state, subactivity state, sub-machine diagram, state with compartments, simple state, send signal state, receive signal state, note, junction pseudostate, internal behavior, initial state, history pseudostate, frame, fragment, final state, exit point, entry point, composite state, choice pseudostate,